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 Advanced Power MOSFET
FEATURES
Logic-Level Gate Drive Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitances Improved Gate Charge Extended Safe Operating Area Lower Leakage Current : 10uA (Max.) @ VDS=-200V Lower RDS(ON) : 0.175 (Typ.)
SFH9250L
BVDSS = -200 V RDS(on) = 0.23 ID = -19.5 A
TO-3P
1 2 3
1.Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol VDSS ID IDM VGS EAS IAR EAR dv/dt PD TJ , TSTG TL Characteristic Drain-to-Source Voltage Continuous Drain Current (TC=25 C) Continuous Drain Current (TC=100 C) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TC=25 C) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8 from case for 5-seconds

Value -200 -19.5 -12.3 -78 20 990 -19.5 20.4 -5.0 204 1.63 - 55 to +150
Units V A A V mJ A mJ V/ns W W/ C
C 300
Thermal Resistance
Symbol RJC RCS RJA Characteristic Junction-to-Case Case-to-Sink Junction-to-Ambient Typ. -0.24 -Max. 0.61 -40 C /W Units
Rev. A
SFH9250L
Electrical Characteristics (TC=25C unless otherwise specified)
Symbol BVDSS BV/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Characteristic Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain(Miller) Charge ------------.175 0.23 13 -Min. Typ. Max. Units -200 --1.0 ------0.17 --------2.0 100 -100 10 100 A S pF V V nA
P-CHANNEL POWER MOSFET
Test Condition VGS=0V,ID=-250A See Fig 7 VDS=-5V,ID=-250A VGS=-20V VGS=20V VDS=-200V VDS=-160V,TC=125 C VGS=-5V,ID=-9.8A VDS=-40V,ID=-9.8A

V/ C ID=-250A
2500 3250 400 520 210 270 20 50 ns 150 310 100 210 65 90 12 54 140 120 --nC
VGS=0V,VDS=-25V,f =1MHz See Fig 5 VDD=-100V,ID=-19.5A, RG=6.2 See Fig 13 VDS=-160V,VGS=-5V, ID=-19.5A See Fig 6 & Fig 12
Source-Drain Diode Ratings and Characteristics
Symbol IS ISM VSD trr Qrr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge

Min. Typ. Max. Units --------260 2.8 -19.5 -78 -1.5 --A V
Test Condition Integral reverse pn-diode in the MOSFET TJ=25 C,IS=-19.5A,VGS=0V
ns TJ=25 C,IF=-19.5A,VDD=-160V C diF/dt=100A/s
Notes ; Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature L=3.9mH, IAS=-19.5A, VDD=-50V, RG=27, Starting TJ =25 ISD-19.5A, di/dt500A/s, VDDBVDSS , Starting TJ =25 Pulse Test : Pulse Width 300s, Duty Cycle 2% Essentially Independent of Operating Temperature
P-CHANNEL POWER MOSFET
Fig 1. Output Characteristics
VGS Top : -10.0 V -8.0 V -6.0 V -5.0 V -4.5 V -4.0 V -3.5 V Bottom : -3.0 V
SFH9250L
Fig 2. Transfer Characteristics
-I D , Drain Current [A]
10
1
-I D, Drain Current [A]
10
1
150
10
0
25 -55
Note 1. VDS = -40V 2. 250 s Pulse Test
10
0
Note : 1. 250 s Pulse Test 2. TC = 25
10
10
-1
-1
10
0
10
1
2
4
6
8
10
-VDS, Drain-Source Voltage [V]
-VGS , Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
0.8
Fig 4. Source-Drain Diode Forward Voltage
0.6 VGS = - 5V
-I DR , Reverse Drain Current [A]
RDS(on) , [ ] Drain-Source On-Resistance
10
1
0.4 VGS = - 10V
10
0
0.2
Note : TJ = 25
150 25
Note : 1. VGS = 0V 2. 250 s Pulse Test
0.0 0 20 40 60 80 100
10
-1
0.6
1.2
1.8
2.4
3.0
3.6
-ID , Drain Current [A]
-VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
12000 10500 9000 7500 6000 4500 3000 1500 0 -1 10
Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd
Fig 6. Gate Charge vs. Gate-Source Voltage
6
VDS = -40V
-VGS, Gate-Source Voltage [V]
VDS = -100V
4
Capacitances [pF]
VDS = -160V
Ciss Coss Crss
Note ; 1. VGS = 0 V 2. f = 1 MHz
2
Note : ID = -19.5 A
0 10
0
10
1
0
20
40
60
80
100
-VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
SFH9250L
Fig 7. Breakdown Voltage vs. Temperature
1.2
2.5
P-CHANNEL POWER MOSFET
Fig 8. On-Resistance vs. Temperature
-BV DSS , (Normalized) Drain-Source Breakdown Voltage
1.1
RDS(ON) , (Normalized) Drain-Source On-Resistance
2.0
1.5
1.0
1.0
0.9
Note : 1. VGS = 0 V 2. ID = -250 A
0.5
Note : 1. VGS = -5 V 2. ID = -9.8 A
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Fig 9. Max. Safe Operating Area
Operation in This Area is Limited by R DS(on)
Fig 10. Max. Drain Current vs. Case Temperature
20
10
2
-I D, Drain Current [A]
1 ms
10
1
10 ms DC
-I D, Drain Current [A]
100 s
15
10
10
0
Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
o o
5
10
-1
10
0
10
1
10
2
0 25
50
75
100
125
150
-VDS, Drain-Source Voltage [V]
TC, Case Temperature []
Fig 11. Thermal Response
10
0
( t) , T h e r m a l R e s p o n s e
D = 0 .5
N o te s : 1 . Z J C( t ) = 0 . 6 1 / W M a x . 2 . D u ty F a c to r, D = t1/t2 3 . T J M - T C = P D M * Z J C( t )
0 .2
10
-1
0 .1 0 .0 5 0 .0 2 0 .0 1
10
-2
PDM t1
s in g le p u ls e
JC
Z
t2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
P-CHANNEL POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
SFH9250L
50K 12V 200nF 300nF
Same Type as DUT VDS
VGS Qg
-5V
VGS
Qgs
Qgd
DUT
-3mA
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
VDS RG
RL VDD
( 0.5 rated VDS )
td(on)
t on tr td(off)
t off tf
Vin
10%
-5V
DUT VDS
90%
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
L VDS VDD ID RG DUT IAS BVDSS VDD
BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD
tp
Time VDS (t)
ID (t) -5V
SFH9250L
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
P-CHANNEL POWER MOSFET
DUT + VDS _ IS L Driver RG
Compliment of DUT (N-Channel)
VDD
VGS
* dv/dt controlled by RG * IS controlled by pulse period
VGS ( Driver )
Gate Pulse Width D = -------------------------Gate Pulse Period
5V
IFM , Body Diode Forward Current
IS ( DUT ) IRM
di/dt
Body Diode Reverse Current
VDS ( DUT )
Body Diode Recovery dv/dt
Vf
VDD
Body Diode Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM
OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R)
SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R)
VCXTM
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4


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